# MOS-6502Q Opcodes¶

Bellow is a list of new and modified opcodes with their binary and function. If an opcode description is not here to specifically state that the opcode collapses register or flag superposition, it can be assumed that it does not. However, if a (non X register indexed instruction would overwrite the value of a register or flag, then superposition would be expected to be overwritten. If an instruction is X register indexed, then in quantum mode, it will operate according to the superposition of the X register.

6502Q New Opcodes
OP Byte Mode Description
HAA 0x02 Implied Bitwise Hadamard on the Accumulator
HAX 0x03 Implied Bitwise Hadamard on the X Register
HAY 0x04 Implied Bitwise Hadamard on the Y Register
SEN 0x0F Implied SEt the Negative flag
PXA 0x12 Implied Apply a bitwise Pauli X on the Accumulator
PXX 0x13 Implied Apply a bitwise Pauli X on the X Register
PXY 0x0C Implied Apply a bitwise Pauli X on the Y Register
HAC 0x17 Implied Apply a Hadamard gate on the carry flag
PYA 0x1A Implied Apply a bitwise Pauli Y on the Accumulator
PYX 0x1B Implied Apply a bitwise Pauli Y on the X Register
PYY 0x1C Implied Apply a bitwise Pauli Y on the Y Register
CLQ 0x1F Implied CLear Quantum mode flag
SEV 0x27 Implied SEt the oVerflow flag
SEZ 0x2B Implied SEt the Zero flag
CLN 0x2F Implied CLear the Negative flag
PZA 0x32 Implied Apply a bitwise Pauli Z on Accumulator
PZX 0x33 Implied Apply a bitwise Pauli Z on the X Register
PZY 0x34 Implied Apply a bitwise Pauli Z on the Y Register
RTA 0x3A Implied Bitwise quarter rotation on $$\rvert1\rangle$$ axis for Accumulator
RTX 0x3B Implied Bitwise quarter rotation on $$\rvert1\rangle$$ axis for the X Register
RTY 0x3C Implied Bitwise quarter rotation on $$\rvert1\rangle$$ axis for the Y Register
SEQ 0x1F Implied SEt the Quantum mode flag
RXA 0x42 Implied Bitwise quarter rotation on X axis for Accumulator
RXX 0x43 Implied Bitwise quarter rotation on X axis for the X Register
RXY 0x44 Implied Bitwise quarter rotation on X axis for the Y Register
CLZ 0x47 Implied CLear the Zero flag
RZA 0x5A Implied Bitwise quarter rotation on Z axis for Accumulator
RZX 0x5B Implied Bitwise quarter rotation on Z axis for the X Register
RZY 0x5C Implied Bitwise quarter rotation on Z axis for the Y Register
FTA 0x62 Implied Quantum Fourier Transform on Accumulator
FTX 0x63 Implied Quantum Fourier Transform on the X register
FTY 0x64 Implied Quantum Fourier Transform on the Y register
ADC 0x75 Zero page X addressing ADd with Carry, Zero Page indexed, will add in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register. (Addressing past the zero page loops to the start.)
ADC 0x7D Absolute X addressing ADd with Carry, Zero Page indexed, will add in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register.
ADC 0x71 Implied Y addressing ADd with Carry, Implied Y indexed, will add in superposition if the Y register is superposed. Results in the Accumulator and carry flag become entangled with the Y register, such that the result of the addition is entangled with the address loaded from in the Y register.
ADC 0x79 Absolute Y addressing ADd with Carry, Zero Page indexed, will add in superposition if the Y register is superposed. Results in the Accumulator and carry flag become entangled with the Y register, such that the result of the addition is entangled with the address loaded from in the Y register.
TXA 0x8A Implied Transfer X register to Accumulator, will maintain superposition of the X register, entangling it to be the same as the Accumulator when measured
TXS 0x9A Implied Transfer X register to Stack pointer, will also collapse superposition of the X register
TAY 0xA8 Implied Transfer Accumulator Y register, will maintain superposition of the Accumulator, entangling it to be the same as the Y register when measured
TAX 0x8A Implied Transfer Accumulator to X register, will maintain superposition of the Accumulator, entangling it to be the same as the X register when measured
LDA 0xB5 Zero page X addressing LoaD Accumulator, Zero Page indexed, will load in superposition if the X register is superposed. Results loaded in the Accumulator become entangled with the X register, such that the result of the load is entangled with the address loaded from in the X register. (Addressing past the zero page loops to the start.
LDA 0xBD Absolute X addressing LoaD Accumulator, Zero Page indexed, will load in superposition if the X register is superposed. Results loaded in the Accumulator become entangled with the X register, such that the result of the load is entangled with the address loaded from in the X register.
SBC 0xF5 Zero page X addressing SuBtract with Carry, Zero Page indexed, will subtract in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register. (Addressing past the zero page loops to the start.
SBC 0xFD Absolute X addressing SuBtract with Carry, Zero Page indexed, will subtract in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register.
ADC 0xF1 Implied Y addressing SuBtract with Carry, Implied Y indexed, will subtract in superposition if the Y register is superposed. Results in the Accumulator and carry flag become entangled with the Y register, such that the result of the subtraction is entangled with the address loaded from in the Y register.
ADC 0xF9 Absolute Y addressing ADd with Carry, Zero Page indexed, will subtract in superposition if the Y register is superposed. Results in the Accumulator and carry flag become entangled with the Y register, such that the result of the subtraction is entangled with the address loaded from in the Y register.
QZZ 0xF7 Implied Apply Pauli Z operator to zero flag
QZS 0xFA Implied Apply Pauli Z operator to negative flag
QZC 0xFB Implied Apply Pauli Z operator to carry flag
6502Q Modified Opcodes
OP Description
AND Bitwise AND with the Accumulator, will also collapse the quantum state of the Accumulator
ASL Arithmetic Shift Left, will also collapse superposition of the carry flag
BIT The 6502’s test BITs opcodes, will also collapse the superposition of the Accumulator
CMP CoMPare accumulator. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag.
CPX CoMPare X register. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag.
CPY CoMPare Y register. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag.
EOR Bitwise EOR with the Accumulator, will also collapse the quantum state of the Accumulator
LSR Logical Shift Right, will also collapse superposition of the carry flag
ORA Bitwise OR with the Accumulator, will also collapse the quantum state of the Accumulator
ROL ROtate Left, will also collapse superposition of the carry flag
STA STore Accumulator, will also collapse superposition of the Accumulator
STX STore X register, will also collapse superposition of the X register
STY STore Y register, will also collapse superposition of the Y register