18 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
27 template <
class B
idirectionalIterator>
28 void reverse(BidirectionalIterator first, BidirectionalIterator last,
bitCapInt stride);
29 template <
class B
idirectionalIterator>
30 void rotate(BidirectionalIterator first, BidirectionalIterator middle, BidirectionalIterator last,
bitCapInt stride);
40 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
49 int64_t ignored2 = -1,
bool useHardwareRNG =
true,
bool useSparseStateVec =
false,
57 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
64 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
73 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
126 std::map<QInterfacePtr, bitLenInt>
Compose(std::vector<QInterfacePtr> toCopy);
130 return Compose(std::dynamic_pointer_cast<QEngineCPU>(toCopy), start);
167 const std::vector<bitLenInt>& controls);
169 const std::vector<bitLenInt>& controls);
171 const std::vector<bitLenInt>& controls);
173 const std::vector<bitLenInt>& controls);
175 const std::vector<bitLenInt>& controls);
179 const unsigned char* values,
bool resetValue =
true);
181 bitLenInt carryIndex,
const unsigned char* values);
183 bitLenInt carryIndex,
const unsigned char* values);
200 const complex* mtrxs,
const std::vector<bitCapInt>& mtrxSkipPowers,
bitCapInt mtrxSkipValueMask);
235 #if ENABLE_QUNIT_CPU_PARALLEL && ENABLE_PTHREAD
267 const bitLenInt& carryStart,
const bitLenInt& length,
const std::vector<bitLenInt>& controls);
271 const bitLenInt& length,
const bool& inverse =
false);
273 const bitLenInt& length,
const std::vector<bitLenInt>& controls,
const bool& inverse =
false);
Definition: dispatchqueue.hpp:33
void finish()
Definition: dispatchqueue.cpp:40
void dispatch(const DispatchFn &op)
Definition: dispatchqueue.cpp:66
void dump()
Definition: dispatchqueue.cpp:51
bool isFinished()
Definition: dispatchqueue.hpp:51
bitLenInt GetPreferredConcurrencyPower()
Definition: parallel_for.hpp:40
bitCapIntOcl GetStride()
Definition: parallel_for.hpp:39
General purpose QEngineCPU implementation.
Definition: qengine_cpu.hpp:35
bool isFinished()
Returns "false" if asynchronous work is still running, and "true" if all previously dispatched asynch...
Definition: qengine_cpu.hpp:62
QEngineCPU(bitLenInt qBitCount, bitCapInt initState, qrack_rand_gen_ptr rgp=nullptr, complex phaseFac=CMPLX_DEFAULT_ARG, bool doNorm=false, bool randomGlobalPhase=true, bool ignored=false, int64_t ignored2=-1, bool useHardwareRNG=true, bool useSparseStateVec=false, real1_f norm_thresh=REAL1_EPSILON, std::vector< int64_t > ignored3={}, bitLenInt ignored4=0U, real1_f ignored5=FP_NORM_EPSILON_F)
Initialize a coherent unit with qBitCount number of bits, to initState unsigned integer permutation s...
Definition: state.cpp:35
bitLenInt Compose(QEngineCPUPtr toCopy)
Combine (a copy of) another QEngineCPU with this one, after the last bit index of this one.
Definition: state.cpp:966
void PhaseParity(real1_f radians, bitCapInt mask)
Parity phase gate.
Definition: state.cpp:728
void DecomposeDispose(bitLenInt start, bitLenInt length, QEngineCPUPtr dest)
Minimally decompose a set of contigious bits from the separable unit.
Definition: state.cpp:1167
void QueueSetRunningNorm(real1_f runningNrm)
Add an operation to the (OpenCL) queue, to set the value of runningNorm, which is the normalization c...
Definition: qengine_cpu.hpp:112
void INCDECBCDC(bitCapInt toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex)
Add BCD integer (without sign, with carry)
Definition: arithmetic.cpp:839
StateVectorPtr stateVec
Definition: qengine_cpu.hpp:39
void ZeroAmplitudes()
Set all amplitudes to 0, and optionally temporarily deallocate state vector RAM.
Definition: qengine_cpu.hpp:89
void Dispatch(bitCapInt workItemCount, DispatchFn fn)
Definition: qengine_cpu.hpp:233
void FreeStateVec(complex *sv=NULL)
Definition: qengine_cpu.hpp:96
QEnginePtr CloneEmpty()
Clone this QEngine's settings, with a zeroed state vector.
Definition: utility.cpp:35
bool isSparse
Definition: qengine_cpu.hpp:37
void CopyStateVec(QEnginePtr src)
Exactly copy the state vector of a different QEngine instance.
Definition: state.cpp:167
void INCDECC(bitCapInt toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex)
Add integer (without sign, with carry)
Definition: arithmetic.cpp:167
void UpdateRunningNorm(real1_f norm_thresh=REAL1_DEFAULT_ARG)
Force a calculation of the norm of the state vector, in order to make it unit length before the next ...
Definition: state.cpp:1825
void Dispose(bitLenInt start, bitLenInt length)
Minimally decompose a set of contiguous bits from the separably composed unit, and discard the separa...
Definition: state.cpp:1313
void XMask(bitCapInt mask)
Masked X gate.
Definition: state.cpp:682
bitLenInt Compose(QInterfacePtr toCopy, bitLenInt start)
Definition: qengine_cpu.hpp:128
void GetQuantumState(complex *outputState)
Get pure quantum state, in unsigned int permutation basis.
Definition: state.cpp:277
bitLenInt Compose(QInterfacePtr toCopy)
Combine another QInterface with this one, after the last bit index of this one.
Definition: qengine_cpu.hpp:125
std::function< bitCapIntOcl(const bitCapIntOcl &, const bitCapIntOcl &)> IOFn
Definition: qengine_cpu.hpp:263
void Apply2x2(bitCapIntOcl offset1, bitCapIntOcl offset2, const complex *mtrx, bitLenInt bitCount, const bitCapIntOcl *qPowersSorted, bool doCalcNorm, real1_f norm_thresh=REAL1_DEFAULT_ARG)
Definition: state.cpp:539
StateVectorPtr AllocStateVec(bitCapIntOcl elemCount)
Definition: state.cpp:1844
void GetProbs(real1 *outputProbs)
Get all probabilities, in unsigned int permutation basis.
Definition: state.cpp:293
void ResetStateVec(StateVectorPtr sv)
Definition: qengine_cpu.hpp:231
void ShuffleBuffers(QEnginePtr engine)
Swap the high half of this engine with the low half of another.
Definition: state.cpp:136
real1_f GetExpectation(bitLenInt valueStart, bitLenInt valueLength)
Definition: utility.cpp:61
void CModNOut(const MFn &kernelFn, const bitCapInt &modN, const bitLenInt &inStart, const bitLenInt &outStart, const bitLenInt &length, const std::vector< bitLenInt > &controls, const bool &inverse=false)
Definition: arithmetic.cpp:652
std::function< bitCapIntOcl(const bitCapIntOcl &)> MFn
Definition: qengine_cpu.hpp:269
~QEngineCPU()
Definition: qengine_cpu.hpp:53
void SetAmplitudePage(const complex *pagePtr, bitCapIntOcl offset, bitCapIntOcl length)
Copy a "page" of amplitudes from pagePtr into this QEngine's internal state.
Definition: state.cpp:81
void MULDIV(const IOFn &inFn, const IOFn &outFn, const bitCapInt &toMul, const bitLenInt &inOutStart, const bitLenInt &carryStart, const bitLenInt &length)
Definition: arithmetic.cpp:403
virtual void ApplyM(bitCapInt qPower, bool result, complex nrm)
Definition: qengine.hpp:154
complex GetAmplitude(bitCapInt perm)
Get the representational amplitude of a full permutation.
Definition: state.cpp:195
virtual QInterfacePtr Decompose(bitLenInt start, bitLenInt length)
Definition: qengine.hpp:270
void CMULDIV(const IOFn &inFn, const IOFn &outFn, const bitCapInt &toMul, const bitLenInt &inOutStart, const bitLenInt &carryStart, const bitLenInt &length, const std::vector< bitLenInt > &controls)
Definition: arithmetic.cpp:469
bool IsZeroAmplitude()
Returns "true" only if amplitudes are all totally 0.
Definition: qengine_cpu.hpp:98
void QueueSetDoNormalize(bool doNorm)
Add an operation to the (OpenCL) queue, to set the value of doNormalize, which controls whether to au...
Definition: qengine_cpu.hpp:108
void SetAmplitude(bitCapInt perm, complex amp)
Sets the representational amplitude of a full permutation.
Definition: state.cpp:211
void GetAmplitudePage(complex *pagePtr, bitCapIntOcl offset, bitCapIntOcl length)
Copy a "page" of amplitudes from this QEngine's internal state, into pagePtr.
Definition: state.cpp:67
void SetQuantumState(const complex *inputState)
Set arbitrary pure quantum state, in unsigned int permutation basis.
Definition: state.cpp:264
bitLenInt Allocate(bitLenInt start, bitLenInt length)
Allocate new "length" count of |0> state qubits at specified qubit index start position.
Definition: utility.cpp:45
real1_f FirstNonzeroPhase()
Get phase of lowest permutation nonzero amplitude.
Definition: qengine_cpu.hpp:80
bitLenInt maxQubits
Definition: qengine_cpu.hpp:38
StateVectorSparsePtr CastStateVecSparse()
Definition: qengine_cpu.hpp:44
void Dump()
If asynchronous work is still running, let the simulator know that it can be aborted.
Definition: qengine_cpu.hpp:71
void INCDECSC(bitCapInt toMod, bitLenInt inOutStart, bitLenInt length, bitLenInt carryIndex)
Common driver method behind INCSC and DECSC (without overflow flag)
Definition: arithmetic.cpp:285
void ModNOut(const MFn &kernelFn, const bitCapInt &modN, const bitLenInt &inStart, const bitLenInt &outStart, const bitLenInt &length, const bool &inverse=false)
Definition: arithmetic.cpp:578
void Finish()
If asynchronous work is still running, block until it finishes.
Definition: qengine_cpu.hpp:55
void SetDevice(int64_t dID)
Set GPU device ID.
Definition: qengine_cpu.hpp:78
Abstract QEngine implementation, for all "Schroedinger method" engines.
Definition: qengine.hpp:31
real1 runningNorm
The value stored in runningNorm should always be the total probability implied by the norm of all amp...
Definition: qengine.hpp:39
virtual void Decompose(bitLenInt start, QInterfacePtr dest)=0
Minimally decompose a set of contiguous bits from the separably composed unit, into "destination".
virtual void ApplyM(bitCapInt qPower, bool result, complex nrm)
Definition: qengine.hpp:154
virtual bitLenInt Allocate(bitLenInt length)
Allocate new "length" count of |0> state qubits at end of qubit index position.
Definition: qinterface.hpp:434
virtual bitLenInt Compose(QInterfacePtr toCopy)
Combine another QInterface with this one, after the last bit index of this one.
Definition: qinterface.hpp:338
bool doNormalize
Definition: qinterface.hpp:148
Half-precision floating-point type.
Definition: half.hpp:2222
void DIV(bitCapInt toDiv, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length)
Divide by integer.
Definition: arithmetic.cpp:456
void CIMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Inverse of controlled multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:735
void MULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:618
void CMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:720
void IFullAdd(bitLenInt inputBit1, bitLenInt inputBit2, bitLenInt carryInSumOut, bitLenInt carryOut)
Inverse of FullAdd.
Definition: arithmetic.cpp:1386
void MUL(bitCapInt toMul, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length)
Multiply by integer.
Definition: arithmetic.cpp:440
void Hash(bitLenInt start, bitLenInt length, const unsigned char *values)
Transform a length of qubit register via lookup through a hash table.
Definition: arithmetic.cpp:1257
bitCapInt IndexedADC(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, const unsigned char *values)
Add based on an indexed load from classical memory.
Definition: arithmetic.cpp:1009
void CDIV(bitCapInt toDiv, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled division by power of integer.
Definition: arithmetic.cpp:558
void CMUL(bitCapInt toMul, bitLenInt inOutStart, bitLenInt carryStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled multiplication by integer.
Definition: arithmetic.cpp:535
void INCBCD(bitCapInt toAdd, bitLenInt start, bitLenInt length)
Add BCD integer (without sign)
Definition: arithmetic.cpp:763
void INC(bitCapInt toAdd, bitLenInt start, bitLenInt length)
Add integer (without sign)
Definition: arithmetic.cpp:68
void INCS(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Add an integer to the register, with sign and without carry.
Definition: arithmetic.cpp:223
void PhaseFlipIfLess(bitCapInt greaterPerm, bitLenInt start, bitLenInt length)
This is an expedient for an adaptive Grover's search for a function's global minimum.
Definition: arithmetic.cpp:1496
void CINC(bitCapInt toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Add integer (without sign, with controls)
Definition: arithmetic.cpp:112
bitCapInt IndexedLDA(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, const unsigned char *values, bool resetValue=true)
Set 8 bit register bits based on read from classical memory.
Definition: arithmetic.cpp:934
void IMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Inverse of multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:630
void POWModNOut(bitCapInt base, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Raise a classical base to a quantum power, modulo N, (out of place)
Definition: arithmetic.cpp:640
void CPOWModNOut(bitCapInt base, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled, raise a classical base to a quantum power, modulo N, (out of place)
Definition: arithmetic.cpp:748
void FullAdd(bitLenInt inputBit1, bitLenInt inputBit2, bitLenInt carryInSumOut, bitLenInt carryOut)
Quantum analog of classical "Full Adder" gate.
Definition: arithmetic.cpp:1302
void CPhaseFlipIfLess(bitCapInt greaterPerm, bitLenInt start, bitLenInt length, bitLenInt flagIndex)
The 6502 uses its carry flag also as a greater-than/less-than flag, for the CMP operation.
Definition: arithmetic.cpp:1471
bitCapInt IndexedSBC(bitLenInt indexStart, bitLenInt indexLength, bitLenInt valueStart, bitLenInt valueLength, bitLenInt carryIndex, const unsigned char *values)
Subtract based on an indexed load from classical memory.
Definition: arithmetic.cpp:1131
void ROL(bitLenInt shift, bitLenInt start, bitLenInt length)
"Circular shift left" - shift bits left, and carry last bits.
Definition: arithmetic.cpp:23
virtual void UniformlyControlledSingleBit(const std::vector< bitLenInt > &controls, bitLenInt qubitIndex, const complex *mtrxs)
Apply a "uniformly controlled" arbitrary single bit unitary transformation.
Definition: qinterface.hpp:590
virtual void U(bitLenInt target, real1_f theta, real1_f phi, real1_f lambda)
General unitary gate.
Definition: rotational.cpp:18
virtual real1_f FirstNonzeroPhase()
Get phase of lowest permutation nonzero amplitude.
Definition: qinterface.hpp:2709
bool ForceMParity(bitCapInt mask, bool result, bool doForce=true)
Act as if is a measurement of parity of the masked set of qubits was applied, except force the (usual...
Definition: state.cpp:1633
real1_f CtrlOrAntiProb(bool controlState, bitLenInt control, bitLenInt target)
PSEUDO-QUANTUM Direct measure of bit probability to be in |1> state, if control is in |0>/|1>,...
Definition: state.cpp:1432
real1_f Prob(bitLenInt qubitIndex)
PSEUDO-QUANTUM Direct measure of bit probability to be in |1> state.
Definition: state.cpp:1360
real1_f ProbMask(bitCapInt mask, bitCapInt permutation)
Direct measure of masked permutation probability.
Definition: state.cpp:1520
QInterfacePtr Clone()
Clone this QInterface.
Definition: utility.cpp:17
void NormalizeState(real1_f nrm=REAL1_DEFAULT_ARG, real1_f norm_thresh=REAL1_DEFAULT_ARG, real1_f phaseArg=ZERO_R1_F)
Apply the normalization factor found by UpdateRunningNorm() or on the fly by a single bit gate.
Definition: state.cpp:1776
bitCapInt MAll()
Measure permutation state of all coherent bits.
Definition: state.cpp:1610
real1_f ProbParity(bitCapInt mask)
Overall probability of any odd permutation of the masked set of bits.
Definition: state.cpp:1561
real1_f ProbReg(bitLenInt start, bitLenInt length, bitCapInt permutation)
Direct measure of register permutation probability.
Definition: state.cpp:1484
real1_f SumSqrDiff(QInterfacePtr toCompare)
Definition: qengine_cpu.hpp:221
Definition: complex16x2simd.hpp:25
std::complex< half_float::half > complex
Definition: qrack_types.hpp:62
std::shared_ptr< QEngine > QEnginePtr
Definition: qrack_types.hpp:141
std::shared_ptr< QInterface > QInterfacePtr
Definition: qinterface.hpp:28
constexpr real1_f ZERO_R1_F
Definition: qrack_types.hpp:152
constexpr real1_f FP_NORM_EPSILON_F
Definition: qrack_types.hpp:245
std::function< void(void)> DispatchFn
Definition: dispatchqueue.hpp:31
void rotate(BidirectionalIterator first, BidirectionalIterator middle, BidirectionalIterator last, bitCapInt stride)
std::shared_ptr< StateVectorSparse > StateVectorSparsePtr
Definition: qrack_types.hpp:137
void reverse(BidirectionalIterator first, BidirectionalIterator last, bitCapInt stride)
std::shared_ptr< QEngineCPU > QEngineCPUPtr
Definition: qengine_cpu.hpp:24
const real1 REAL1_DEFAULT_ARG
Definition: qrack_types.hpp:155
const real1 ZERO_R1
Definition: qrack_types.hpp:151
float real1_f
Definition: qrack_types.hpp:64
QRACK_CONST complex CMPLX_DEFAULT_ARG
Definition: qrack_types.hpp:242
std::shared_ptr< StateVector > StateVectorPtr
Definition: qrack_types.hpp:133
const real1 REAL1_EPSILON
Definition: qrack_types.hpp:157
bitCapIntOcl pow2Ocl(const bitLenInt &p)
Definition: qrack_functions.hpp:23
#define bitLenInt
Definition: qrack_types.hpp:44
#define qrack_rand_gen_ptr
Definition: qrack_types.hpp:146
#define bitCapInt
Definition: qrack_types.hpp:105
#define bitCapIntOcl
Definition: qrack_types.hpp:91