Qrack  9.0
General classical-emulating-quantum development framework
qengine.hpp
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1 //
3 // (C) Daniel Strano and the Qrack contributors 2017-2022. All rights reserved.
4 //
5 // This is a multithreaded, universal quantum register simulation, allowing
6 // (nonphysical) register cloning and direct measurement of probability and
7 // phase, to leverage what advantages classical emulation of qubits can have.
8 //
9 // Licensed under the GNU Lesser General Public License V3.
10 // See LICENSE.md in the project root or https://www.gnu.org/licenses/lgpl-3.0.en.html
11 // for details.
12 
13 #pragma once
14 
15 #include "qinterface.hpp"
16 #include "qparity.hpp"
17 
18 #if ENABLE_ALU
19 #include "qalu.hpp"
20 #endif
21 
22 namespace Qrack {
23 
24 class QEngine;
25 typedef std::shared_ptr<QEngine> QEnginePtr;
26 
30 #if ENABLE_ALU
31 class QEngine : public QAlu, public QParity, public QInterface {
32 #else
33 class QEngine : public QParity, public QInterface {
34 #endif
35 protected:
36  bool useHostRam;
41 
42  inline bool IsPhase(complex const* mtrx) { return IS_NORM_0(mtrx[1]) && IS_NORM_0(mtrx[2]); }
43  inline bool IsInvert(complex const* mtrx) { return IS_NORM_0(mtrx[0]) && IS_NORM_0(mtrx[3]); }
44 
45  bool IsIdentity(complex const* mtrx, bool isControlled)
46  {
47  // If the effect of applying the buffer would be (approximately or exactly) that of applying the identity
48  // operator, then we can discard this buffer without applying it.
49  if (!IS_NORM_0(mtrx[0U] - mtrx[3U]) || !IsPhase(mtrx)) {
50  return false;
51  }
52 
53  // Now, we know that mtrx[1] and mtrx[2] are 0 and mtrx[0]==mtrx[3].
54 
55  // If the global phase offset has been randomized, we assume that global phase offsets are inconsequential, for
56  // the user's purposes. If the global phase offset has not been randomized, user code might explicitly depend on
57  // the global phase offset.
58 
59  if ((isControlled || !randGlobalPhase) && !IS_SAME(ONE_CMPLX, mtrx[0U])) {
60  return false;
61  }
62 
63  // If we haven't returned false by now, we're buffering an identity operator (exactly or up to an arbitrary
64  // global phase factor).
65  return true;
66  }
67 
68  void EitherMtrx(const std::vector<bitLenInt>& controls, complex const* mtrx, bitLenInt target, bool isAnti);
69 
70 public:
71  QEngine(bitLenInt qBitCount, qrack_rand_gen_ptr rgp = nullptr, bool doNorm = false, bool randomGlobalPhase = true,
72  bool useHostMem = false, bool useHardwareRNG = true, real1_f norm_thresh = REAL1_EPSILON)
73  : QInterface(qBitCount, rgp, doNorm, useHardwareRNG, randomGlobalPhase, norm_thresh)
74  , useHostRam(useHostMem)
76  , maxQPowerOcl(pow2Ocl(qBitCount))
77  {
78  if (qBitCount > (sizeof(bitCapIntOcl) * bitsInByte)) {
79  throw std::invalid_argument(
80  "Cannot instantiate a register with greater capacity than native types on emulating system.");
81  }
82  };
83 
86  : useHostRam(false)
88  , maxQPowerOcl(0U)
89  {
90  // Intentionally left blank
91  }
92 
93  virtual ~QEngine()
94  {
95  // Virtual destructor for inheritance
96  }
97 
98  virtual void SetQubitCount(bitLenInt qb)
99  {
102  }
103 
106  {
107  Finish();
108  return (real1_f)runningNorm;
109  }
110 
112  virtual void SwitchHostPtr(bool useHostMem){};
114  virtual void ResetHostPtr() { SwitchHostPtr(useHostRam); }
116  virtual void SetDevice(int64_t dID) {}
118  virtual int64_t GetDevice() { return -1; }
119 
121  virtual void ZeroAmplitudes() = 0;
123  virtual void CopyStateVec(QEnginePtr src) = 0;
125  virtual bool IsZeroAmplitude() = 0;
127  virtual void GetAmplitudePage(complex* pagePtr, bitCapIntOcl offset, bitCapIntOcl length) = 0;
129  virtual void SetAmplitudePage(complex const* pagePtr, bitCapIntOcl offset, bitCapIntOcl length) = 0;
132  virtual void SetAmplitudePage(
133  QEnginePtr pageEnginePtr, bitCapIntOcl srcOffset, bitCapIntOcl dstOffset, bitCapIntOcl length) = 0;
136  virtual void ShuffleBuffers(QEnginePtr engine) = 0;
138  virtual QEnginePtr CloneEmpty() = 0;
139 
142  virtual void QueueSetDoNormalize(bool doNorm) = 0;
145  virtual void QueueSetRunningNorm(real1_f runningNrm) = 0;
146 
147  virtual void ZMask(bitCapInt mask) { PhaseParity((real1_f)PI_R1, mask); }
148 
149  virtual bool ForceM(bitLenInt qubitIndex, bool result, bool doForce = true, bool doApply = true);
150  virtual bitCapInt ForceM(const std::vector<bitLenInt>& bits, const std::vector<bool>& values, bool doApply = true);
151  virtual bitCapInt ForceMReg(
152  bitLenInt start, bitLenInt length, bitCapInt result, bool doForce = true, bool doApply = true);
153 
154  virtual void ApplyM(bitCapInt qPower, bool result, complex nrm)
155  {
156  bitCapInt powerTest = result ? qPower : 0U;
157  ApplyM(qPower, powerTest, nrm);
158  }
159  virtual void ApplyM(bitCapInt regMask, bitCapInt result, complex nrm) = 0;
160 
161  virtual void Mtrx(complex const* mtrx, bitLenInt qubit);
162  virtual void MCMtrx(const std::vector<bitLenInt>& controls, complex const* mtrx, bitLenInt target)
163  {
164  EitherMtrx(controls, mtrx, target, false);
165  }
166  virtual void MACMtrx(const std::vector<bitLenInt>& controls, complex const* mtrx, bitLenInt target)
167  {
168  EitherMtrx(controls, mtrx, target, true);
169  }
170  virtual void UCMtrx(
171  const std::vector<bitLenInt>& controls, const complex* mtrx, bitLenInt target, bitCapInt controlPerm);
172  virtual void CSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
173  virtual void AntiCSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
174  virtual void CSqrtSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
175  virtual void AntiCSqrtSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
176  virtual void CISqrtSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
177  virtual void AntiCISqrtSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
178 
179 #if ENABLE_ALU
180  using QInterface::M;
181  virtual bool M(bitLenInt q) { return QInterface::M(q); }
182  using QInterface::X;
183  virtual void X(bitLenInt q) { QInterface::X(q); }
184  virtual void INC(bitCapInt toAdd, bitLenInt start, bitLenInt length) { QInterface::INC(toAdd, start, length); }
185  virtual void DEC(bitCapInt toSub, bitLenInt start, bitLenInt length) { QInterface::DEC(toSub, start, length); }
186  virtual void INCC(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
187  {
188  QInterface::INCC(toAdd, start, length, carryIndex);
189  }
190  virtual void DECC(bitCapInt toSub, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
191  {
192  QInterface::DECC(toSub, start, length, carryIndex);
193  }
194  virtual void INCS(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
195  {
196  QInterface::INCS(toAdd, start, length, overflowIndex);
197  }
198  virtual void DECS(bitCapInt toSub, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
199  {
200  QInterface::DECS(toSub, start, length, overflowIndex);
201  }
202  virtual void CINC(bitCapInt toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector<bitLenInt>& controls)
203  {
204  QInterface::CINC(toAdd, inOutStart, length, controls);
205  }
206  virtual void CDEC(bitCapInt toSub, bitLenInt inOutStart, bitLenInt length, const std::vector<bitLenInt>& controls)
207  {
208  QInterface::CDEC(toSub, inOutStart, length, controls);
209  }
210  virtual void INCDECC(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
211  {
212  QInterface::INCDECC(toAdd, start, length, carryIndex);
213  }
214  virtual void MULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
215  {
216  QInterface::MULModNOut(toMul, modN, inStart, outStart, length);
217  }
218  virtual void IMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
219  {
220  QInterface::IMULModNOut(toMul, modN, inStart, outStart, length);
221  }
222  virtual void CMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length,
223  const std::vector<bitLenInt>& controls)
224  {
225  QInterface::CMULModNOut(toMul, modN, inStart, outStart, length, controls);
226  }
227  virtual void CIMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length,
228  const std::vector<bitLenInt>& controls)
229  {
230  QInterface::CIMULModNOut(toMul, modN, inStart, outStart, length, controls);
231  }
232 #endif
233 
234  using QInterface::Swap;
235  virtual void Swap(bitLenInt qubit1, bitLenInt qubit2);
236  using QInterface::ISwap;
237  virtual void ISwap(bitLenInt qubit1, bitLenInt qubit2);
238  using QInterface::IISwap;
239  virtual void IISwap(bitLenInt qubit1, bitLenInt qubit2);
240  using QInterface::SqrtSwap;
241  virtual void SqrtSwap(bitLenInt qubit1, bitLenInt qubit2);
242  using QInterface::ISqrtSwap;
243  virtual void ISqrtSwap(bitLenInt qubit1, bitLenInt qubit2);
244  using QInterface::FSim;
245  virtual void FSim(real1_f theta, real1_f phi, bitLenInt qubitIndex1, bitLenInt qubitIndex2);
246 
247  virtual real1_f ProbAll(bitCapInt fullRegister)
248  {
249  if (doNormalize) {
250  NormalizeState();
251  }
252 
253  return clampProb((real1_f)norm(GetAmplitude(fullRegister)));
254  }
255  virtual real1_f CtrlOrAntiProb(bool controlState, bitLenInt control, bitLenInt target);
256  virtual real1_f CProb(bitLenInt control, bitLenInt target) { return CtrlOrAntiProb(true, control, target); }
257  virtual real1_f ACProb(bitLenInt control, bitLenInt target) { return CtrlOrAntiProb(false, control, target); }
258  virtual real1_f ProbReg(bitLenInt start, bitLenInt length, bitCapInt permutation) = 0;
259  virtual void ProbRegAll(bitLenInt start, bitLenInt length, real1* probsArray);
260  virtual real1_f ProbMask(bitCapInt mask, bitCapInt permutation) = 0;
261 
262  virtual real1_f GetExpectation(bitLenInt valueStart, bitLenInt valueLength) = 0;
263 
264  virtual void Apply2x2(bitCapIntOcl offset1, bitCapIntOcl offset2, complex const* mtrx, bitLenInt bitCount,
265  bitCapIntOcl const* qPowersSorted, bool doCalcNorm, real1_f norm_thresh = REAL1_DEFAULT_ARG) = 0;
266  virtual void ApplyControlled2x2(const std::vector<bitLenInt>& controls, bitLenInt target, complex const* mtrx);
267  virtual void ApplyAntiControlled2x2(const std::vector<bitLenInt>& controls, bitLenInt target, complex const* mtrx);
268 
269  using QInterface::Decompose;
271  {
272  QEnginePtr dest = CloneEmpty();
273  dest->SetQubitCount(length);
274  Decompose(start, dest);
275 
276  return dest;
277  }
278 
279  virtual std::map<bitCapInt, int> MultiShotMeasureMask(const std::vector<bitCapInt>& qPowers, unsigned shots);
280  virtual void MultiShotMeasureMask(
281  const std::vector<bitCapInt>& qPowers, unsigned shots, unsigned long long* shotsArray);
282 };
283 } // namespace Qrack
Definition: qalu.hpp:22
Abstract QEngine implementation, for all "Schroedinger method" engines.
Definition: qengine.hpp:31
virtual void SetQubitCount(bitLenInt qb)
Definition: qengine.hpp:98
virtual void Apply2x2(bitCapIntOcl offset1, bitCapIntOcl offset2, complex const *mtrx, bitLenInt bitCount, bitCapIntOcl const *qPowersSorted, bool doCalcNorm, real1_f norm_thresh=REAL1_DEFAULT_ARG)=0
virtual void ApplyM(bitCapInt regMask, bitCapInt result, complex nrm)=0
virtual void FSim(real1_f theta, real1_f phi, bitLenInt qubitIndex1, bitLenInt qubitIndex2)=0
The 2-qubit "fSim" gate, (useful in the simulation of particles with fermionic statistics)
virtual void MCMtrx(const std::vector< bitLenInt > &controls, complex const *mtrx, bitLenInt target)
Apply an arbitrary single bit unitary transformation, with arbitrary control bits.
Definition: qengine.hpp:162
void EitherMtrx(const std::vector< bitLenInt > &controls, complex const *mtrx, bitLenInt target, bool isAnti)
Definition: qengine.cpp:29
virtual void CSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply a swap with arbitrary control bits.
Definition: qengine.cpp:222
virtual std::map< bitCapInt, int > MultiShotMeasureMask(const std::vector< bitCapInt > &qPowers, unsigned shots)
Statistical measure of masked permutation probability.
Definition: qengine.cpp:567
virtual void SwitchHostPtr(bool useHostMem)
Switch to/from host/device state vector bufffer.
Definition: qengine.hpp:112
virtual ~QEngine()
Definition: qengine.hpp:93
virtual void CISqrtSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply an inverse square root of swap with arbitrary control bits.
Definition: qengine.cpp:334
virtual bitCapInt ForceMReg(bitLenInt start, bitLenInt length, bitCapInt result, bool doForce=true, bool doApply=true)
Measure permutation state of a register.
Definition: qengine.cpp:511
virtual void ISqrtSwap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Inverse square root of Swap gate.
Definition: gates.cpp:211
virtual void MACMtrx(const std::vector< bitLenInt > &controls, complex const *mtrx, bitLenInt target)
Apply an arbitrary single bit unitary transformation, with arbitrary (anti-)control bits.
Definition: qengine.hpp:166
virtual void SetDevice(int64_t dID)
Set GPU device ID.
Definition: qengine.hpp:116
virtual void CSqrtSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply a square root of swap with arbitrary control bits.
Definition: qengine.cpp:277
virtual void IMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Inverse of multiplication modulo N by integer, (out of place)
Definition: qengine.hpp:218
real1 runningNorm
The value stored in runningNorm should always be the total probability implied by the norm of all amp...
Definition: qengine.hpp:39
virtual real1_f CProb(bitLenInt control, bitLenInt target)
Direct measure of bit probability to be in |1> state, if control bit is |1>.
Definition: qengine.hpp:256
virtual void INCS(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Add a classical integer to the register, with sign and without carry.
Definition: qengine.hpp:194
virtual void DECS(bitCapInt toSub, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Add a classical integer to the register, with sign and without carry.
Definition: qengine.hpp:198
virtual real1_f ProbMask(bitCapInt mask, bitCapInt permutation)=0
Direct measure of masked permutation probability.
virtual void UCMtrx(const std::vector< bitLenInt > &controls, const complex *mtrx, bitLenInt target, bitCapInt controlPerm)
Apply an arbitrary single bit unitary transformation, with arbitrary control bits,...
Definition: qengine.cpp:51
bool IsPhase(complex const *mtrx)
Definition: qengine.hpp:42
bool IsIdentity(complex const *mtrx, bool isControlled)
Definition: qengine.hpp:45
bool IsInvert(complex const *mtrx)
Definition: qengine.hpp:43
virtual void INCC(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Add integer (without sign, with carry)
Definition: qengine.hpp:186
virtual real1_f ACProb(bitLenInt control, bitLenInt target)
Direct measure of bit probability to be in |1> state, if control bit is |0>.
Definition: qengine.hpp:257
virtual void Swap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Swap values of two bits in register.
Definition: gates.cpp:153
virtual void IISwap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Inverse ISwap - Swap values of two bits in register, and apply phase factor of -i if bits are differe...
Definition: gates.cpp:176
virtual void AntiCISqrtSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply an inverse square root of swap with arbitrary (anti) control bits.
Definition: qengine.cpp:364
bitCapIntOcl maxQPowerOcl
Definition: qengine.hpp:40
virtual void Decompose(bitLenInt start, QInterfacePtr dest)=0
Minimally decompose a set of contiguous bits from the separably composed unit, into "destination".
virtual void INCDECC(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Common driver method behind INCC and DECC (without sign, with carry)
Definition: qengine.hpp:210
virtual void ResetHostPtr()
Reset host/device state vector bufffer usage to default.
Definition: qengine.hpp:114
virtual bool ForceM(bitLenInt qubitIndex, bool result, bool doForce=true, bool doApply=true)
PSEUDO-QUANTUM - Acts like a measurement gate, except with a specified forced result.
Definition: qengine.cpp:80
virtual void SetAmplitudePage(complex const *pagePtr, bitCapIntOcl offset, bitCapIntOcl length)=0
Copy a "page" of amplitudes from pagePtr into this QEngine's internal state.
bool useHostRam
Definition: qengine.hpp:36
virtual void CopyStateVec(QEnginePtr src)=0
Exactly copy the state vector of a different QEngine instance.
virtual void AntiCSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply a swap with arbitrary (anti) control bits.
Definition: qengine.cpp:251
virtual int64_t GetDevice()
Get GPU device ID.
Definition: qengine.hpp:118
virtual bool IsZeroAmplitude()=0
Returns "true" only if amplitudes are all totally 0.
virtual void ZMask(bitCapInt mask)
Masked Z gate.
Definition: qengine.hpp:147
virtual void INC(bitCapInt toAdd, bitLenInt start, bitLenInt length)
Add integer (without sign)
Definition: qengine.hpp:184
virtual QEnginePtr CloneEmpty()=0
Clone this QEngine's settings, with a zeroed state vector.
virtual void ZeroAmplitudes()=0
Set all amplitudes to 0, and optionally temporarily deallocate state vector RAM.
virtual void ApplyM(bitCapInt qPower, bool result, complex nrm)
Definition: qengine.hpp:154
virtual QInterfacePtr Decompose(bitLenInt start, bitLenInt length)
Schmidt decompose a length of qubits.
Definition: qengine.hpp:270
virtual void QueueSetDoNormalize(bool doNorm)=0
Add an operation to the (OpenCL) queue, to set the value of doNormalize, which controls whether to au...
virtual bool M(bitLenInt q)
Definition: qengine.hpp:181
virtual real1_f GetRunningNorm()
Get in-flight renormalization factor.
Definition: qengine.hpp:105
virtual void CINC(bitCapInt toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Add integer (without sign, with controls)
Definition: qengine.hpp:202
virtual void SetAmplitudePage(QEnginePtr pageEnginePtr, bitCapIntOcl srcOffset, bitCapIntOcl dstOffset, bitCapIntOcl length)=0
Copy a "page" of amplitudes from another QEngine, pointed to by pageEnginePtr, into this QEngine's in...
virtual real1_f ProbAll(bitCapInt fullRegister)
Direct measure of full permutation probability.
Definition: qengine.hpp:247
virtual real1_f CtrlOrAntiProb(bool controlState, bitLenInt control, bitLenInt target)
Definition: qengine.cpp:483
virtual void ProbRegAll(bitLenInt start, bitLenInt length, real1 *probsArray)
Definition: qengine.cpp:500
virtual void ISwap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Swap values of two bits in register, and apply phase factor of i if bits are different.
Definition: gates.cpp:164
virtual void DEC(bitCapInt toSub, bitLenInt start, bitLenInt length)
Add integer (without sign)
Definition: qengine.hpp:185
QEngine(bitLenInt qBitCount, qrack_rand_gen_ptr rgp=nullptr, bool doNorm=false, bool randomGlobalPhase=true, bool useHostMem=false, bool useHardwareRNG=true, real1_f norm_thresh=REAL1_EPSILON)
Definition: qengine.hpp:71
virtual void CIMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Inverse of controlled multiplication modulo N by integer, (out of place)
Definition: qengine.hpp:227
virtual void ApplyAntiControlled2x2(const std::vector< bitLenInt > &controls, bitLenInt target, complex const *mtrx)
Definition: qengine.cpp:407
virtual void GetAmplitudePage(complex *pagePtr, bitCapIntOcl offset, bitCapIntOcl length)=0
Copy a "page" of amplitudes from this QEngine's internal state, into pagePtr.
virtual void ApplyControlled2x2(const std::vector< bitLenInt > &controls, bitLenInt target, complex const *mtrx)
Definition: qengine.cpp:391
virtual void SqrtSwap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Square root of Swap gate.
Definition: gates.cpp:188
virtual void MULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Multiplication modulo N by integer, (out of place)
Definition: qengine.hpp:214
virtual void QueueSetRunningNorm(real1_f runningNrm)=0
Add an operation to the (OpenCL) queue, to set the value of runningNorm, which is the normalization c...
virtual void Mtrx(complex const *mtrx, bitLenInt qubit)
Apply an arbitrary single bit unitary transformation.
Definition: qengine.cpp:19
virtual void DECC(bitCapInt toSub, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Subtract classical integer (without sign, with carry)
Definition: qengine.hpp:190
virtual void ShuffleBuffers(QEnginePtr engine)=0
Swap the high half of this engine with the low half of another.
virtual real1_f ProbReg(bitLenInt start, bitLenInt length, bitCapInt permutation)=0
Direct measure of register permutation probability.
virtual void X(bitLenInt q)
Definition: qengine.hpp:183
virtual void CDEC(bitCapInt toSub, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Subtract integer (without sign, with controls)
Definition: qengine.hpp:206
virtual real1_f GetExpectation(bitLenInt valueStart, bitLenInt valueLength)=0
QEngine()
Default constructor, primarily for protected internal use.
Definition: qengine.hpp:85
virtual void CMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled multiplication modulo N by integer, (out of place)
Definition: qengine.hpp:222
virtual void AntiCSqrtSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply a square root of swap with arbitrary (anti) control bits.
Definition: qengine.cpp:307
A "Qrack::QInterface" is an abstract interface exposing qubit permutation state vector with methods t...
Definition: qinterface.hpp:146
bitCapInt maxQPower
Definition: qinterface.hpp:154
virtual complex GetAmplitude(bitCapInt perm)=0
Get the representational amplitude of a full permutation.
bool randGlobalPhase
Definition: qinterface.hpp:149
virtual void Decompose(bitLenInt start, QInterfacePtr dest)=0
Minimally decompose a set of contiguous bits from the separably composed unit, into "destination".
virtual void SetQubitCount(bitLenInt qb)
Definition: qinterface.hpp:159
static real1_f clampProb(real1_f toClamp)
Definition: qinterface.hpp:169
bool doNormalize
Definition: qinterface.hpp:148
Definition: qparity.hpp:22
Half-precision floating-point type.
Definition: half.hpp:2222
virtual void CMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:259
virtual void CIMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Inverse of controlled multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:296
virtual void INCDECC(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Common driver method behind INCC and DECC.
Definition: arithmetic.cpp:63
virtual void IMULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Inverse of multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:226
virtual void CINC(bitCapInt toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Add integer (without sign, with controls)
Definition: arithmetic.cpp:114
virtual void INCC(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Add integer (without sign, with carry)
Definition: arithmetic.cpp:88
virtual void DECC(bitCapInt toSub, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Subtract classical integer (without sign, with carry)
Definition: arithmetic.cpp:100
virtual void INCS(bitCapInt toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Add a classical integer to the register, with sign and without carry.
Definition: arithmetic.cpp:167
virtual void DEC(bitCapInt toSub, bitLenInt start, bitLenInt length)
Subtract classical integer (without sign)
Definition: arithmetic.cpp:57
virtual void INC(bitCapInt toAdd, bitLenInt start, bitLenInt length)
Add integer (without sign)
Definition: arithmetic.cpp:24
virtual void DECS(bitCapInt toSub, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Subtract a classical integer from the register, with sign and without carry.
Definition: arithmetic.cpp:182
virtual void MULModNOut(bitCapInt toMul, bitCapInt modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:191
virtual void CDEC(bitCapInt toSub, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Subtract classical integer (without sign, with controls)
Definition: arithmetic.cpp:160
virtual void PhaseParity(real1_f radians, bitCapInt mask)
Parity phase gate.
Definition: gates.cpp:388
virtual bool M(bitLenInt qubitIndex)
Measurement gate.
Definition: qinterface.hpp:976
virtual void X(bitLenInt qubit)
X gate.
Definition: qinterface.hpp:1054
virtual void U(bitLenInt target, real1_f theta, real1_f phi, real1_f lambda)
General unitary gate.
Definition: rotational.cpp:18
virtual void FSim(real1_f theta, real1_f phi, bitLenInt qubitIndex1, bitLenInt qubitIndex2)=0
The 2-qubit "fSim" gate, (useful in the simulation of particles with fermionic statistics)
virtual void ISqrtSwap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Inverse square root of Swap gate.
Definition: gates.cpp:211
virtual void Swap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Swap values of two bits in register.
Definition: gates.cpp:153
virtual void IISwap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Inverse ISwap - Swap values of two bits in register, and apply phase factor of -i if bits are differe...
Definition: gates.cpp:176
virtual void ISwap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Swap values of two bits in register, and apply phase factor of i if bits are different.
Definition: gates.cpp:164
virtual void SqrtSwap(bitLenInt qubitIndex1, bitLenInt qubitIndex2)
Square root of Swap gate.
Definition: gates.cpp:188
virtual void Finish()
If asynchronous work is still running, block until it finishes.
Definition: qinterface.hpp:2576
virtual void NormalizeState(real1_f nrm=REAL1_DEFAULT_ARG, real1_f norm_thresh=REAL1_DEFAULT_ARG, real1_f phaseArg=ZERO_R1_F)=0
Apply the normalization factor found by UpdateRunningNorm() or on the fly by a single bit gate.
Definition: complex16x2simd.hpp:25
std::complex< half_float::half > complex
Definition: qrack_types.hpp:62
std::shared_ptr< QEngine > QEnginePtr
Definition: qrack_types.hpp:141
std::shared_ptr< QInterface > QInterfacePtr
Definition: qinterface.hpp:28
const real1 ONE_R1
Definition: qrack_types.hpp:153
double norm(const complex2 &c)
Definition: complex16x2simd.hpp:101
const real1 REAL1_DEFAULT_ARG
Definition: qrack_types.hpp:155
const real1 PI_R1
Definition: qrack_types.hpp:158
QRACK_CONST complex ONE_CMPLX
Definition: qrack_types.hpp:239
float real1_f
Definition: qrack_types.hpp:64
const real1 REAL1_EPSILON
Definition: qrack_types.hpp:157
bitCapIntOcl pow2Ocl(const bitLenInt &p)
Definition: qrack_functions.hpp:23
#define IS_SAME(c1, c2)
Definition: qrack_types.hpp:28
#define bitsInByte
Definition: qrack_types.hpp:144
#define bitLenInt
Definition: qrack_types.hpp:44
#define qrack_rand_gen_ptr
Definition: qrack_types.hpp:146
#define bitCapInt
Definition: qrack_types.hpp:105
#define bitCapIntOcl
Definition: qrack_types.hpp:91
#define IS_NORM_0(c)
Definition: qrack_types.hpp:27