Qrack  10.0
General classical-emulating-quantum development framework
qengine.hpp
Go to the documentation of this file.
1 //
3 // (C) Daniel Strano and the Qrack contributors 2017-2022. All rights reserved.
4 //
5 // This is a multithreaded, universal quantum register simulation, allowing
6 // (nonphysical) register cloning and direct measurement of probability and
7 // phase, to leverage what advantages classical emulation of qubits can have.
8 //
9 // Licensed under the GNU Lesser General Public License V3.
10 // See LICENSE.md in the project root or https://www.gnu.org/licenses/lgpl-3.0.en.html
11 // for details.
12 
13 #pragma once
14 
15 #include "qinterface.hpp"
16 #include "qparity.hpp"
17 
18 #if ENABLE_ALU
19 #include "qalu.hpp"
20 #endif
21 
22 namespace Qrack {
23 
24 class QEngine;
25 typedef std::shared_ptr<QEngine> QEnginePtr;
26 
30 #if ENABLE_ALU
31 class QEngine : public QAlu, public QParity, public QInterface {
32 #else
33 class QEngine : public QParity, public QInterface {
34 #endif
35 protected:
36  bool useHostRam;
41  double fidelity;
42 
43  inline bool IsPhase(const complex* mtrx) { return IS_NORM_0(mtrx[1]) && IS_NORM_0(mtrx[2]); }
44  inline bool IsInvert(const complex* mtrx) { return IS_NORM_0(mtrx[0]) && IS_NORM_0(mtrx[3]); }
45 
46  bool IsIdentity(const complex* mtrx, bool isControlled)
47  {
48  // If the effect of applying the buffer would be (approximately or exactly) that of applying the identity
49  // operator, then we can discard this buffer without applying it.
50  if (!IS_NORM_0(mtrx[0U] - mtrx[3U]) || !IsPhase(mtrx)) {
51  return false;
52  }
53 
54  // Now, we know that mtrx[1] and mtrx[2] are 0 and mtrx[0]==mtrx[3].
55 
56  // If the global phase offset has been randomized, we assume that global phase offsets are inconsequential, for
57  // the user's purposes. If the global phase offset has not been randomized, user code might explicitly depend on
58  // the global phase offset.
59 
60  if ((isControlled || !randGlobalPhase) && !IS_SAME(ONE_CMPLX, mtrx[0U])) {
61  return false;
62  }
63 
64  // If we haven't returned false by now, we're buffering an identity operator (exactly or up to an arbitrary
65  // global phase factor).
66  return true;
67  }
68 
69  void EitherMtrx(const std::vector<bitLenInt>& controls, const complex* mtrx, bitLenInt target, bool isAnti);
70 
71  virtual void Copy(QInterfacePtr orig) { Copy(std::dynamic_pointer_cast<QEngine>(orig)); }
72  virtual void Copy(QEnginePtr orig)
73  {
74  QInterface::Copy(orig);
75  useHostRam = orig->useHostRam;
76  runningNorm = orig->runningNorm;
77  maxQPowerOcl = orig->maxQPowerOcl;
78  }
79 
80 public:
81  QEngine(bitLenInt qBitCount, qrack_rand_gen_ptr rgp = nullptr, bool doNorm = false, bool randomGlobalPhase = true,
82  bool useHostMem = false, bool useHardwareRNG = true, real1_f norm_thresh = REAL1_EPSILON)
83  : QInterface(qBitCount, rgp, doNorm, useHardwareRNG, randomGlobalPhase, norm_thresh)
84  , useHostRam(useHostMem)
86  , maxQPowerOcl(pow2Ocl(qBitCount))
87  , fidelity(1.0)
88  {
89  if (qBitCount > (sizeof(bitCapIntOcl) * bitsInByte)) {
90  throw std::invalid_argument(
91  "Cannot instantiate a register with greater capacity than native types on emulating system.");
92  }
93  };
94 
97  : useHostRam(false)
99  , maxQPowerOcl(1U)
100  {
101  // Intentionally left blank
102  }
103 
104  virtual ~QEngine()
105  {
106  // Virtual destructor for inheritance
107  }
108 
109  using QInterface::Copy;
110 
111  virtual void SetQubitCount(bitLenInt qb)
112  {
115  }
116 
119  {
120  Finish();
121  return (real1_f)runningNorm;
122  }
123 
125  virtual void SwitchHostPtr(bool useHostMem){};
127  virtual void ResetHostPtr() { SwitchHostPtr(useHostRam); }
129  virtual void SetDevice(int64_t dID) {}
131  virtual int64_t GetDevice() { return -1; }
132 
134  virtual void ZeroAmplitudes() = 0;
136  virtual void CopyStateVec(QEnginePtr src) = 0;
138  virtual bool IsZeroAmplitude() = 0;
140  virtual void GetAmplitudePage(complex* pagePtr, bitCapIntOcl offset, bitCapIntOcl length) = 0;
142  virtual void SetAmplitudePage(const complex* pagePtr, bitCapIntOcl offset, bitCapIntOcl length) = 0;
145  virtual void SetAmplitudePage(
146  QEnginePtr pageEnginePtr, bitCapIntOcl srcOffset, bitCapIntOcl dstOffset, bitCapIntOcl length) = 0;
149  virtual void ShuffleBuffers(QEnginePtr engine) = 0;
151  virtual QEnginePtr CloneEmpty() = 0;
152 
155  virtual void QueueSetDoNormalize(bool doNorm) = 0;
158  virtual void QueueSetRunningNorm(real1_f runningNrm) = 0;
159 
160  virtual void ZMask(const bitCapInt& mask) { PhaseParity((real1_f)PI_R1, mask); }
161 
162  virtual bool ForceM(bitLenInt qubitIndex, bool result, bool doForce = true, bool doApply = true);
163  virtual bitCapInt ForceM(const std::vector<bitLenInt>& bits, const std::vector<bool>& values, bool doApply = true);
164  virtual bitCapInt ForceMReg(
165  bitLenInt start, bitLenInt length, const bitCapInt& result, bool doForce = true, bool doApply = true);
166 
167  virtual void ApplyM(const bitCapInt& qPower, bool result, const complex& nrm)
168  {
169  const bitCapInt powerTest = result ? qPower : ZERO_BCI;
170  ApplyM(qPower, powerTest, nrm);
171  }
172  virtual void ApplyM(const bitCapInt& regMask, const bitCapInt& result, const complex& nrm) = 0;
173 
174  virtual void Mtrx(const complex* mtrx, bitLenInt qubit);
175  virtual void MCMtrx(const std::vector<bitLenInt>& controls, const complex* mtrx, bitLenInt target)
176  {
177  EitherMtrx(controls, mtrx, target, false);
178  }
179  virtual void MACMtrx(const std::vector<bitLenInt>& controls, const complex* mtrx, bitLenInt target)
180  {
181  EitherMtrx(controls, mtrx, target, true);
182  }
183  virtual void UCMtrx(
184  const std::vector<bitLenInt>& controls, const complex* mtrx, bitLenInt target, const bitCapInt& controlPerm);
185  virtual void CSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
186  virtual void AntiCSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
187  virtual void CSqrtSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
188  virtual void AntiCSqrtSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
189  virtual void CISqrtSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
190  virtual void AntiCISqrtSwap(const std::vector<bitLenInt>& controls, bitLenInt qubit1, bitLenInt qubit2);
191 
192 #if ENABLE_ALU
193  using QInterface::M;
194  virtual bool M(bitLenInt q) { return QInterface::M(q); }
195  using QInterface::X;
196  virtual void X(bitLenInt q) { QInterface::X(q); }
197  virtual void INC(const bitCapInt& toAdd, bitLenInt start, bitLenInt length)
198  {
199  QInterface::INC(toAdd, start, length);
200  }
201  virtual void DEC(const bitCapInt& toSub, bitLenInt start, bitLenInt length)
202  {
203  QInterface::DEC(toSub, start, length);
204  }
205  virtual void INCC(const bitCapInt& toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
206  {
207  QInterface::INCC(toAdd, start, length, carryIndex);
208  }
209  virtual void DECC(const bitCapInt& toSub, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
210  {
211  QInterface::DECC(toSub, start, length, carryIndex);
212  }
213  virtual void INCS(const bitCapInt& toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
214  {
215  QInterface::INCS(toAdd, start, length, overflowIndex);
216  }
217  virtual void DECS(const bitCapInt& toSub, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
218  {
219  QInterface::DECS(toSub, start, length, overflowIndex);
220  }
221  virtual void CINC(
222  const bitCapInt& toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector<bitLenInt>& controls)
223  {
224  QInterface::CINC(toAdd, inOutStart, length, controls);
225  }
226  virtual void CDEC(
227  const bitCapInt& toSub, bitLenInt inOutStart, bitLenInt length, const std::vector<bitLenInt>& controls)
228  {
229  QInterface::CDEC(toSub, inOutStart, length, controls);
230  }
231  virtual void INCDECC(const bitCapInt& toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
232  {
233  QInterface::INCDECC(toAdd, start, length, carryIndex);
234  }
235  virtual void MULModNOut(
236  const bitCapInt& toMul, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
237  {
238  QInterface::MULModNOut(toMul, modN, inStart, outStart, length);
239  }
240  virtual void IMULModNOut(
241  const bitCapInt& toMul, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
242  {
243  QInterface::IMULModNOut(toMul, modN, inStart, outStart, length);
244  }
245  virtual void CMULModNOut(const bitCapInt& toMul, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart,
246  bitLenInt length, const std::vector<bitLenInt>& controls)
247  {
248  QInterface::CMULModNOut(toMul, modN, inStart, outStart, length, controls);
249  }
250  virtual void CIMULModNOut(const bitCapInt& toMul, const bitCapInt& modN, bitLenInt inStart, bitLenInt outStart,
251  bitLenInt length, const std::vector<bitLenInt>& controls)
252  {
253  QInterface::CIMULModNOut(toMul, modN, inStart, outStart, length, controls);
254  }
255 #endif
256 
257  using QInterface::Swap;
258  virtual void Swap(bitLenInt qubit1, bitLenInt qubit2);
259  using QInterface::ISwap;
260  virtual void ISwap(bitLenInt qubit1, bitLenInt qubit2);
261  using QInterface::IISwap;
262  virtual void IISwap(bitLenInt qubit1, bitLenInt qubit2);
263  using QInterface::SqrtSwap;
264  virtual void SqrtSwap(bitLenInt qubit1, bitLenInt qubit2);
265  using QInterface::ISqrtSwap;
266  virtual void ISqrtSwap(bitLenInt qubit1, bitLenInt qubit2);
267  using QInterface::FSim;
268  virtual void FSim(real1_f theta, real1_f phi, bitLenInt qubitIndex1, bitLenInt qubitIndex2);
269 
270  virtual real1_f ProbAll(const bitCapInt& fullRegister)
271  {
272  if (doNormalize) {
273  NormalizeState();
274  }
275 
276  return clampProb((real1_f)norm(GetAmplitude(fullRegister)));
277  }
278  virtual real1_f CtrlOrAntiProb(bool controlState, bitLenInt control, bitLenInt target);
279  virtual real1_f CProb(bitLenInt control, bitLenInt target) { return CtrlOrAntiProb(true, control, target); }
280  virtual real1_f ACProb(bitLenInt control, bitLenInt target) { return CtrlOrAntiProb(false, control, target); }
281  virtual real1_f ProbReg(bitLenInt start, bitLenInt length, const bitCapInt& permutation) = 0;
282  virtual void ProbRegAll(bitLenInt start, bitLenInt length, real1* probsArray);
283  virtual real1_f ProbMask(const bitCapInt& mask, const bitCapInt& permutation) = 0;
284 
285  virtual real1_f GetExpectation(bitLenInt valueStart, bitLenInt valueLength) = 0;
286 
287  virtual void Apply2x2(bitCapIntOcl offset1, bitCapIntOcl offset2, const complex* mtrx, bitLenInt bitCount,
288  bitCapIntOcl const* qPowersSorted, bool doCalcNorm, real1_f norm_thresh = REAL1_DEFAULT_ARG) = 0;
289  virtual void ApplyControlled2x2(const std::vector<bitLenInt>& controls, bitLenInt target, const complex* mtrx);
290  virtual void ApplyAntiControlled2x2(const std::vector<bitLenInt>& controls, bitLenInt target, const complex* mtrx);
291 
292  using QInterface::Decompose;
294  {
295  QEnginePtr dest = CloneEmpty();
296  dest->SetQubitCount(length);
297  Decompose(start, dest);
298  return dest;
299  }
300 
301  virtual std::map<bitCapInt, int> MultiShotMeasureMask(const std::vector<bitCapInt>& qPowers, unsigned shots);
302  virtual void MultiShotMeasureMask(
303  const std::vector<bitCapInt>& qPowers, unsigned shots, unsigned long long* shotsArray);
304 };
305 } // namespace Qrack
Definition: qalu.hpp:22
Abstract QEngine implementation, for all "Schroedinger method" engines.
Definition: qengine.hpp:31
virtual void SetQubitCount(bitLenInt qb)
Definition: qengine.hpp:111
virtual void CIMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Inverse of controlled multiplication modulo N by integer, (out of place)
Definition: qengine.hpp:250
double fidelity
Definition: qengine.hpp:41
virtual void ApplyAntiControlled2x2(const std::vector< bitLenInt > &controls, bitLenInt target, const complex *mtrx)
Definition: qengine.cpp:388
virtual void Copy(QInterfacePtr orig)
Definition: qengine.hpp:71
virtual void CSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply a swap with arbitrary control bits.
Definition: qengine.cpp:212
virtual std::map< bitCapInt, int > MultiShotMeasureMask(const std::vector< bitCapInt > &qPowers, unsigned shots)
Statistical measure of masked permutation probability.
Definition: qengine.cpp:543
virtual void ApplyControlled2x2(const std::vector< bitLenInt > &controls, bitLenInt target, const complex *mtrx)
Definition: qengine.cpp:372
virtual real1_f ProbReg(bitLenInt start, bitLenInt length, const bitCapInt &permutation)=0
Direct measure of register permutation probability.
virtual void SwitchHostPtr(bool useHostMem)
Switch to/from host/device state vector bufffer.
Definition: qengine.hpp:125
virtual ~QEngine()
Definition: qengine.hpp:104
virtual void INCDECC(const bitCapInt &toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Common driver method behind INCC and DECC (without sign, with carry)
Definition: qengine.hpp:231
virtual void CISqrtSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply an inverse square root of swap with arbitrary control bits.
Definition: qengine.cpp:318
virtual void ApplyM(const bitCapInt &regMask, const bitCapInt &result, const complex &nrm)=0
virtual void ISqrtSwap(bitLenInt qubit1, bitLenInt qubit2)
Inverse square root of Swap gate.
Definition: gates.cpp:224
void EitherMtrx(const std::vector< bitLenInt > &controls, const complex *mtrx, bitLenInt target, bool isAnti)
Definition: qengine.cpp:29
virtual void INCC(const bitCapInt &toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Add integer (without sign, with carry)
Definition: qengine.hpp:205
virtual void SetDevice(int64_t dID)
Set GPU device ID.
Definition: qengine.hpp:129
virtual void Mtrx(const complex *mtrx, bitLenInt qubit)
Apply an arbitrary single bit unitary transformation.
Definition: qengine.cpp:19
virtual void CSqrtSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply a square root of swap with arbitrary control bits.
Definition: qengine.cpp:265
virtual void ApplyM(const bitCapInt &qPower, bool result, const complex &nrm)
Definition: qengine.hpp:167
virtual void UCMtrx(const std::vector< bitLenInt > &controls, const complex *mtrx, bitLenInt target, const bitCapInt &controlPerm)
Apply an arbitrary single bit unitary transformation, with arbitrary control bits,...
Definition: qengine.cpp:50
real1 runningNorm
The value stored in runningNorm should always be the total probability implied by the norm of all amp...
Definition: qengine.hpp:39
virtual real1_f CProb(bitLenInt control, bitLenInt target)
Direct measure of bit probability to be in |1> state, if control bit is |1>.
Definition: qengine.hpp:279
bool IsInvert(const complex *mtrx)
Definition: qengine.hpp:44
virtual void SetAmplitudePage(const complex *pagePtr, bitCapIntOcl offset, bitCapIntOcl length)=0
Copy a "page" of amplitudes from pagePtr into this QEngine's internal state.
virtual real1_f ACProb(bitLenInt control, bitLenInt target)
Direct measure of bit probability to be in |1> state, if control bit is |0>.
Definition: qengine.hpp:280
virtual void AntiCISqrtSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply an inverse square root of swap with arbitrary (anti) control bits.
Definition: qengine.cpp:346
bitCapIntOcl maxQPowerOcl
Definition: qengine.hpp:40
virtual void Decompose(bitLenInt start, QInterfacePtr dest)=0
Minimally decompose a set of contiguous bits from the separably composed unit, into "destination".
virtual real1_f ProbMask(const bitCapInt &mask, const bitCapInt &permutation)=0
Direct measure of masked permutation probability.
virtual void IISwap(bitLenInt qubit1, bitLenInt qubit2)
Inverse ISwap - Swap values of two bits in register, and apply phase factor of -i if bits are differe...
Definition: gates.cpp:189
virtual void ResetHostPtr()
Reset host/device state vector bufffer usage to default.
Definition: qengine.hpp:127
virtual bool ForceM(bitLenInt qubitIndex, bool result, bool doForce=true, bool doApply=true)
PSEUDO-QUANTUM - Acts like a measurement gate, except with a specified forced result.
Definition: qengine.cpp:78
virtual void MULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Multiplication modulo N by integer, (out of place)
Definition: qengine.hpp:235
virtual void DEC(const bitCapInt &toSub, bitLenInt start, bitLenInt length)
Add integer (without sign)
Definition: qengine.hpp:201
virtual void IMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Inverse of multiplication modulo N by integer, (out of place)
Definition: qengine.hpp:240
virtual void ISwap(bitLenInt qubit1, bitLenInt qubit2)
Swap values of two bits in register, and apply phase factor of i if bits are different.
Definition: gates.cpp:177
virtual void ZMask(const bitCapInt &mask)
Masked Z gate.
Definition: qengine.hpp:160
virtual void DECC(const bitCapInt &toSub, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Subtract classical integer (without sign, with carry)
Definition: qengine.hpp:209
bool useHostRam
Definition: qengine.hpp:36
virtual void CopyStateVec(QEnginePtr src)=0
Exactly copy the state vector of a different QEngine instance.
virtual void AntiCSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply a swap with arbitrary (anti) control bits.
Definition: qengine.cpp:240
virtual int64_t GetDevice()
Get GPU device ID.
Definition: qengine.hpp:131
virtual bool IsZeroAmplitude()=0
Returns "true" only if amplitudes are all totally 0.
virtual void Apply2x2(bitCapIntOcl offset1, bitCapIntOcl offset2, const complex *mtrx, bitLenInt bitCount, bitCapIntOcl const *qPowersSorted, bool doCalcNorm, real1_f norm_thresh=REAL1_DEFAULT_ARG)=0
virtual void Copy(QEnginePtr orig)
Definition: qengine.hpp:72
bool IsIdentity(const complex *mtrx, bool isControlled)
Definition: qengine.hpp:46
virtual QEnginePtr CloneEmpty()=0
Clone this QEngine's settings, with a zeroed state vector.
virtual void ZeroAmplitudes()=0
Set all amplitudes to 0, and optionally temporarily deallocate state vector RAM.
virtual void SqrtSwap(bitLenInt qubit1, bitLenInt qubit2)
Square root of Swap gate.
Definition: gates.cpp:201
virtual QInterfacePtr Decompose(bitLenInt start, bitLenInt length)
Schmidt decompose a length of qubits.
Definition: qengine.hpp:293
virtual void QueueSetDoNormalize(bool doNorm)=0
Add an operation to the (OpenCL) queue, to set the value of doNormalize, which controls whether to au...
virtual bool M(bitLenInt q)
Definition: qengine.hpp:194
virtual real1_f GetRunningNorm()
Get in-flight renormalization factor.
Definition: qengine.hpp:118
virtual void FSim(real1_f theta, real1_f phi, bitLenInt qubit1, bitLenInt qubit2)
The 2-qubit "fSim" gate, (useful in the simulation of particles with fermionic statistics)
Definition: qinterface.hpp:2389
virtual void SetAmplitudePage(QEnginePtr pageEnginePtr, bitCapIntOcl srcOffset, bitCapIntOcl dstOffset, bitCapIntOcl length)=0
Copy a "page" of amplitudes from another QEngine, pointed to by pageEnginePtr, into this QEngine's in...
virtual void DECS(const bitCapInt &toSub, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Add a classical integer to the register, with sign and without carry.
Definition: qengine.hpp:217
virtual void INCS(const bitCapInt &toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Add a classical integer to the register, with sign and without carry.
Definition: qengine.hpp:213
virtual real1_f CtrlOrAntiProb(bool controlState, bitLenInt control, bitLenInt target)
Definition: qengine.cpp:463
virtual void MACMtrx(const std::vector< bitLenInt > &controls, const complex *mtrx, bitLenInt target)
Apply an arbitrary single bit unitary transformation, with arbitrary (anti-)control bits.
Definition: qengine.hpp:179
virtual void CINC(const bitCapInt &toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Add integer (without sign, with controls)
Definition: qengine.hpp:221
virtual void ProbRegAll(bitLenInt start, bitLenInt length, real1 *probsArray)
Definition: qengine.cpp:479
QEngine(bitLenInt qBitCount, qrack_rand_gen_ptr rgp=nullptr, bool doNorm=false, bool randomGlobalPhase=true, bool useHostMem=false, bool useHardwareRNG=true, real1_f norm_thresh=REAL1_EPSILON)
Definition: qengine.hpp:81
virtual void Swap(bitLenInt qubit1, bitLenInt qubit2)
Swap values of two bits in register.
Definition: gates.cpp:166
virtual void GetAmplitudePage(complex *pagePtr, bitCapIntOcl offset, bitCapIntOcl length)=0
Copy a "page" of amplitudes from this QEngine's internal state, into pagePtr.
virtual bitCapInt ForceMReg(bitLenInt start, bitLenInt length, const bitCapInt &result, bool doForce=true, bool doApply=true)
Measure permutation state of a register.
Definition: qengine.cpp:490
virtual void MCMtrx(const std::vector< bitLenInt > &controls, const complex *mtrx, bitLenInt target)
Apply an arbitrary single bit unitary transformation, with arbitrary control bits.
Definition: qengine.hpp:175
virtual void QueueSetRunningNorm(real1_f runningNrm)=0
Add an operation to the (OpenCL) queue, to set the value of runningNorm, which is the normalization c...
bool IsPhase(const complex *mtrx)
Definition: qengine.hpp:43
virtual void ShuffleBuffers(QEnginePtr engine)=0
Swap the high half of this engine with the low half of another.
virtual void X(bitLenInt q)
Definition: qengine.hpp:196
virtual void CMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled multiplication modulo N by integer, (out of place)
Definition: qengine.hpp:245
virtual void INC(const bitCapInt &toAdd, bitLenInt start, bitLenInt length)
Add integer (without sign)
Definition: qengine.hpp:197
virtual void CDEC(const bitCapInt &toSub, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Subtract integer (without sign, with controls)
Definition: qengine.hpp:226
virtual real1_f GetExpectation(bitLenInt valueStart, bitLenInt valueLength)=0
QEngine()
Default constructor, primarily for protected internal use.
Definition: qengine.hpp:96
virtual real1_f ProbAll(const bitCapInt &fullRegister)
Direct measure of full permutation probability.
Definition: qengine.hpp:270
virtual void AntiCSqrtSwap(const std::vector< bitLenInt > &controls, bitLenInt qubit1, bitLenInt qubit2)
Apply a square root of swap with arbitrary (anti) control bits.
Definition: qengine.cpp:293
A "Qrack::QInterface" is an abstract interface exposing qubit permutation state vector with methods t...
Definition: qinterface.hpp:141
bitCapInt maxQPower
Definition: qinterface.hpp:149
bool randGlobalPhase
Definition: qinterface.hpp:144
virtual void Decompose(bitLenInt start, QInterfacePtr dest)=0
Minimally decompose a set of contiguous bits from the separably composed unit, into "destination".
virtual void SetQubitCount(bitLenInt qb)
Definition: qinterface.hpp:268
static real1_f clampProb(real1_f toClamp)
Definition: qinterface.hpp:158
bool doNormalize
Definition: qinterface.hpp:143
virtual complex GetAmplitude(const bitCapInt &perm)=0
Get the representational amplitude of a full permutation.
Definition: qparity.hpp:22
Half-precision floating-point type.
Definition: half.hpp:2222
virtual void MULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:127
virtual void DECS(const bitCapInt &toSub, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Subtract a classical integer from the register, with sign and without carry.
Definition: qinterface.hpp:2200
virtual void INCDECC(const bitCapInt &toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Common driver method behind INCC and DECC.
Definition: arithmetic.cpp:53
virtual void CINC(const bitCapInt &toAdd, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Add integer (without sign, with controls)
Definition: arithmetic.cpp:79
virtual void INCS(const bitCapInt &toAdd, bitLenInt start, bitLenInt length, bitLenInt overflowIndex)
Add a classical integer to the register, with sign and without carry.
Definition: qinterface.hpp:2189
virtual void DECC(const bitCapInt &toSub, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Subtract classical integer (without sign, with carry)
Definition: qinterface.hpp:2163
virtual void DEC(const bitCapInt &toSub, bitLenInt start, bitLenInt length)
Subtract classical integer (without sign)
Definition: qinterface.hpp:2141
virtual void INC(const bitCapInt &toAdd, bitLenInt start, bitLenInt length)
Add integer (without sign)
Definition: arithmetic.cpp:20
virtual void IMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length)
Inverse of multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:165
virtual void CDEC(const bitCapInt &toSub, bitLenInt inOutStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Subtract classical integer (without sign, with controls)
Definition: qinterface.hpp:2181
virtual void INCC(const bitCapInt &toAdd, bitLenInt start, bitLenInt length, bitLenInt carryIndex)
Add integer (without sign, with carry)
Definition: qinterface.hpp:2151
virtual void CMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Controlled multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:201
virtual void CIMULModNOut(const bitCapInt &toMul, const bitCapInt &modN, bitLenInt inStart, bitLenInt outStart, bitLenInt length, const std::vector< bitLenInt > &controls)
Inverse of controlled multiplication modulo N by integer, (out of place)
Definition: arithmetic.cpp:240
virtual void X(bitLenInt qubit)
X gate.
Definition: qinterface.hpp:1091
virtual void PhaseParity(real1_f radians, const bitCapInt &mask)
Parity phase gate.
Definition: gates.cpp:399
virtual void U(bitLenInt target, real1_f theta, real1_f phi, real1_f lambda)
General unitary gate.
Definition: rotational.cpp:18
virtual bool M(bitLenInt qubit)
Measurement gate.
Definition: qinterface.hpp:1020
virtual void ISqrtSwap(bitLenInt qubit1, bitLenInt qubit2)
Inverse square root of Swap gate.
Definition: gates.cpp:224
virtual void IISwap(bitLenInt qubit1, bitLenInt qubit2)
Inverse ISwap - Swap values of two bits in register, and apply phase factor of -i if bits are differe...
Definition: gates.cpp:189
virtual void ISwap(bitLenInt qubit1, bitLenInt qubit2)
Swap values of two bits in register, and apply phase factor of i if bits are different.
Definition: gates.cpp:177
virtual void SqrtSwap(bitLenInt qubit1, bitLenInt qubit2)
Square root of Swap gate.
Definition: gates.cpp:201
virtual void FSim(real1_f theta, real1_f phi, bitLenInt qubit1, bitLenInt qubit2)
The 2-qubit "fSim" gate, (useful in the simulation of particles with fermionic statistics)
Definition: qinterface.hpp:2389
virtual void Swap(bitLenInt qubit1, bitLenInt qubit2)
Swap values of two bits in register.
Definition: gates.cpp:166
virtual void Finish()
If asynchronous work is still running, block until it finishes.
Definition: qinterface.hpp:2850
virtual QInterfacePtr Copy()
Copy this QInterface.
Definition: qinterface.hpp:2992
virtual void NormalizeState(real1_f nrm=REAL1_DEFAULT_ARG, real1_f norm_thresh=REAL1_DEFAULT_ARG, real1_f phaseArg=ZERO_R1_F)=0
Apply the normalization factor found by UpdateRunningNorm() or on the fly by a single bit gate.
GLOSSARY: bitLenInt - "bit-length integer" - unsigned integer ID of qubit position in register bitCap...
Definition: complex16x2simd.hpp:25
std::shared_ptr< QEngine > QEnginePtr
Definition: qrack_types.hpp:159
std::shared_ptr< QInterface > QInterfacePtr
Definition: qinterface.hpp:29
std::complex< real1 > complex
Definition: qrack_types.hpp:136
double norm(const complex2 &c)
Definition: complex16x2simd.hpp:122
QRACK_CONST real1 REAL1_EPSILON
Definition: qrack_types.hpp:208
QRACK_CONST complex ONE_CMPLX
Definition: qrack_types.hpp:262
QRACK_CONST real1 ONE_R1
Definition: qrack_types.hpp:193
float real1_f
Definition: qrack_types.hpp:103
QRACK_CONST real1 PI_R1
Definition: qrack_types.hpp:186
const bitCapInt ZERO_BCI
Definition: qrack_types.hpp:138
bitCapIntOcl pow2Ocl(const bitLenInt &p)
Definition: qrack_functions.hpp:144
#define IS_SAME(c1, c2)
Definition: qrack_types.hpp:30
#define bitsInByte
Definition: qrack_types.hpp:162
#define REAL1_DEFAULT_ARG
Definition: qrack_types.hpp:185
#define bitLenInt
Definition: qrack_types.hpp:42
#define qrack_rand_gen_ptr
Definition: qrack_types.hpp:164
#define bitCapInt
Definition: qrack_types.hpp:66
#define bitCapIntOcl
Definition: qrack_types.hpp:54
#define IS_NORM_0(c)
Definition: qrack_types.hpp:29